CRESTS/TESSC
(CRESTS Embedded Software Testing on Simulated Computer)
Embedded Software Testing on Simulated Computer is to meet
the urgent needs of testing and verification to the software
under testing in real CPU environment
The features of CRESTS/TESSC are as following,
The interface styles, application styles and the most main
functions of CRESTS/ATAT have been reserved.
However the process under testing is running on the real
CPU, CRESTS/TESSC neither insert stubs to the process under
testing, nor occupy the CPU resource.
CRESTS/TESSC can proceed the programming simulation of CPU
I/O behavior and external hardware behavior. And the closed-loop
of application program under testing is realized also. So
no devices will be introduced in software testing.
On the basis of software verification devices CRESTS/TESSC
of ABW Company in Holland, the testing support and analysis
of CRESTS/TESSC as well as the high-level applications testing
environment supporting C Language of CRESTS/TESSC are realized.
Strict real-time requirements.
CRESTS/TESSC (Simulation HAndling Module) is a proprietary system specialized in the verification and development of industry embedded software.
The CRESTS/TESSC operating system is a multi computer environment composed of a host computer (general purpose workstation) and a Software HAndling Module (SHAM). The CRESTS/TESSC includes a copy of the target processor (CPU) and a Support & Control system. The target CPU executes the binary code of assembler language program, Ada language program, C language program under testing, assembler language as well as the mixed language program of C and Ada. The Support & Control system controls the target CPU and simulates the low level hardware/software interfaces. The Host is used for the overall test and control, providing the more complex environment simulation models.
The final binary code of assembler language program, Ada language program and mixed language program under testing can be executed in real target CPU without any modification, then used for the software under testing real simulated system of external apperceive environment.
One of the most important features of the CRESTS/TESSC is that the copy of target CPU and all its relation time can be controlled by the Support & Control system. That means the act and process of software under testing including assembler language program, C language program, Ada language program and mixed language program under testing will be totally controlled. It also can explore accurately and specifically to the internal software under testing during testing. It is able to proceed more software testings and study the deep level problems of software under testing.
When the target CPU of CRESTS/TESSC system starts, it is in the state of RESET. As the target CPU is released, it begins to Built-In Test (BIT). After BIT completes, the target CPU jumps to the memories start and begins to execute. By this time, the Support & Control system set up breakpoints, so the target is in Stop. The Support & Control system adjust Simulated Real Time (SRT) used for the applications of true time and SRT. When loading the software under testing, the target CPU must continue working, change over to the state of RUN. The running of the target CPU can be stopped at any time, change over to the state of Stop. As the target CPU receive the certain issue produced by CRESTS/TESSC system hardware, its running can be stopped automatically. Breakpoint is able to be installed in any address of memories and I/O at any time.
The final binary code of C language program and mixed language program under testing can be executed in real target CPU without any modification. Software is running in the real-time environment. When stopping the real target CPU, all the time environment related with software under testing stops, too, but the software under testing is running, the same running process is able to go on. The pause does not destroy and stop such running process of the software under testing. In the aspect of software under testing, nothing stops, time is going on. Though SRT stops, real time is going on. The Support & Control system can proceed simulated inputs or outputs with this property. SRT realizes the high real time requirements of the testing platform to maximum.
The features of CRESTS/TESSC are as following.
Real-time simulate all I/O interfaces of real target.
The final binary code of software under testing including the assembler language program, Ada language program and mixed language program can be executed in the real target CPU without any modification.
Support setting breakpoints on all memories and I/O addresses of real target CPU.
Support setting breakpoints in the running of software under testing at any time.
Support the fault injection from the internal of process and external environment, aiming at software under testing including assembler language program, advanced language program and mixed language program.
Support coverage analysis on the basis of running on real target CPU.
Trace buffer. The trace space is up to 1k.
Real-time simulation. Simulation time.
The system is re-usable.
Coverage analysis of CRESTS/TESSC
assembler language program, C language program and mixed
language program
CRESTS/TESSC assembler language program, C language program and mixed language program of assembler language and C language provide dynamic coverage analysis.
CRESTS/TESSC assigns each address which can be visited by target processor a R-FLAG and a W-FLAG for recording whether corresponding addresses have been visited. These bits are cleared at the original state. If the address has been visited, the corresponding R-FLAG and W-FLAG will install automatically.
Circuit Design
|
Address |
Data |
R Flag-bit |
W Flag-bit |
|
0x0321 |
0x8D5F |
0 |
1 |
|
0x0322 |
0x00D4 |
1 |
1 |
|
0x0323 |
0x0328 |
0 |
0 |
CRESTS/TESSC realizes the coverage analysis based on R-FLAG/W-FLAG to the program under testing with assembler language, C language program and mixed language program. When these programs under testing are running, the R-FLAG/W-FLAG corresponding to the address visited by assembler language, C language program and mixed language program are set true automatically. With the method of CRESTS/TESSC providing, it can map the address space R-FLAG/W-FLAG in the target CPU for the software under testing to the related bin code that running during the test. After a further analysis, searching and handling, as well as further corresponds to the self-run assembler language code or C language code of assembler language program, C language program and mixed language program under testing.
CRESTS/TESSC applications
of software validation testing, system testing and fault
injection
Open loop testing
CRESTS/TESSC acting as a complete semi-physical testing
platform can proceed open loop testing to embedded software
without extra devices. CRESTS/TESSC has a copy of real target
CPU and is able to simulate all I/O. So CRESTS/TESSC provides
a running environment which is closed to real computer embedded
software testing, The assembler language program, Ada language
program and mixed language program under testing can be
executed in real target CPU without any modification. Software
is running in the true real-time environment so that software
test people can concentrate on software testing. Excluding
the coupling mistake of true computer hardware and software
under testing, thereby test people will give a more accurate
and objective evaluation, and increase the testing efficiency
as well as minish the testing difficulties.
In open loop testing, the platform composed of Host and CRESTS/TESSC Support & Control system provides all I/O simulation, injects testing datum and fault to software under testing, receives running output of software under testing, displays running datum, provides system and the interface of test people, handles with the datum setting, displaying and printing, records the results of testing and print, as well as controls the whole testing process. Through the simulated time mechanism, the testing process of software under testing can be totally controlled, and avoid the datum injection through hardware. It has some difficulties to the boundary and certain cases. It is able to observe the software running situation sufficiently and proceed software testing conveniently and easily.
Close loop testing
CRESTS/TESSC acting as a complete semi-physical simulated testing platform can proceed close loop testing to spaceborne software. The Support & Control system of CRESTS/TESSC has an independent processor with high capability of processing. Support & Control system is a high performance totally real-time embedded system, which can be run as a simulator. It provides the external perceptible environment of assembler language program, C and Ada language program, and mixed language program under testing. The close loop consists of Support & Control system and the target CPU of assembler language program, Ada program and mixed language program under testing. Host, acting as the testing computer, is proceeding cases injection, executing the information-tracing and displaying the results. The system is highly reusable.
Fault injection
CRESTS/TESSC can access and control all address spaces of memories and I/O. It is able to control and modify the running state of assembler language program, C language program and mixed language program under testing totally. Therefore, CRESTS/TESSC can inject any kinds of faults directly to the running process of assembler language program, C language program and mixed language program under testing at any time. That can be the illegal testing cases direct inputs of assembler language program, C language program and mixed language program under testing external perceptible environment, also can be the sudden illegal requesting datum of external I/O environment of assembler language program, C language program and mixed language program under testing in running. CRESTS/TESSC is able to excellently catch the mistake, control and record the software handling process to the mistakes so as to provide evaluators with strong analysis.
Due to CRESTS/TESSC can read/write any address in the target CPU, so CRESTS/TESSC is able to write any data from any memory address in the target CPU at any time, simulate the stochastic sudden and unpredictable mistake running state in the target CPU, for example, the physics of target CPU changes, produce 0/1
evaginable mistake. Another important feature of CRESTS/TESSC is providing fault instruction, such as freeze subroutine state instruction, irregular false instruction and so on, as well as the convenient and easy-to-use method of fault injection.
Other applications of CRESTS/TESSC
CRESTS/TESSC is able to be used in every parts of embedded software life circle, such as architecture design, detail design, tracing and debugging, validation and verification, training as well as the maintenance in later period. In the development stage, the development and testing of embedded software system can proceed with relevant hardware system in parallel. During the maintenance in later period, it provides the validated testing of space satellite version updated software (the real target of space satellite has not been available. If testing is toward to the modification of the spaceborne software, that will be a huge challenge. CRESTS/TESSC provides such reliable method). Many successful projects prove that using CRESTS/TESSC is able to improve the quality and the efficiency of software testing obviously, and greatly reduce the costs of software testing.
